JETCAS Calls for Papers: Revolution of AI and Machine Learning with Processing-in-Memory (PIM): from Systems, Architectures, to Circuits
Submission Deadline: 7 December 2021
Scope and Purpose
Artificial intelligence (AI) and machine learning (ML) technology are revolutionizing many fields of study as well as a wide range of industry sectors such as information technology, mobile communication, automotive, and manufacturing. As more industries are adopting the technology, we are facing an ever-increasing demand for a new type of hardware that enables faster and more energy-efficient processing for AI workloads.
Traditional von-Neumann compute-centric computers such as CPU and GPU, which fetch data from the memory devices to on-chip processing cores, have been improving their computing performances rapidly with the scaling of process technology. However, in the era of AI and ML, as most workloads involve simple but data-intensive processing between large-scale model parameters and activations, data transfer between the storage and compute device becomes the bottleneck of the system (i.e., von-Neumann bottleneck). Memory-centric computing takes an opposite approach to solve this data movement problem. Instead of fetching data from the storage to compute, data stays in the memory while the processing units are merged into it so that computations can be done in the same location without moving any data. Processing-In-Memory (PIM) has attracted the research community's attention because it can improve energy efficiency dramatically in memory-centric computing by minimizing the data movement. While the benefits of PIM are well accepted in the era of AL and ML, the limitations and the challenges in implementing PIM have not been investigated thoroughly. Many special issues of IEEE transactions have focused on ‘AI and ML algorithms’, ‘AI and ML system architectures’, and ‘AI and ML hardware accelerators. However, none of them has covered PIM comprehensively. PIM can be designed with various memory types such as dynamic-random-access-memory (DRAM), static-random-access-memory (SRAM), and various non-volatile memory (NVM) devices. The pros and cons of each memory type for PIM operation vary significantly. They also affect the architecture and the circuit implementation.
Topics of Interest
The topics of interest for this issue include, but are not limited to:
- Processing-in-memory circuits and systems for machine learning and AI applications
- Processing-in-memory circuits and systems for other applications including graph processing, data analytics, and genomics
- Energy-efficient processing-in-memory design for edge computing
- Processing-in-memory modeling and data management
- Solving memory bottlenecks for emerging data-centric systems
- Modeling of emerging memory devices for processing-in-memory
- Processing-in-memory architectures for general-purpose processing and/or neural networks
- Processing-in-memory architectures and applications
- Interaction of processing-in-memory modules with CPU architecture
- Multi-level memory hierarchy architectures for processing-in-memory
- System-level design and benchmarking of processing-in-memory in AI and machine learning
- Conventional and emerging memory technologies for processing-in-memory
- Heterogeneous integration of processing-in-memory
- Processing-in-memory prototypes for AI, machine learning, and neural networks
- Processing-in-memory computing for edge/IoT/embedded systems
Submission Procedure
Prospective authors are invited to submit their papers following the instructions provided on the JETCAS submission website. The submitted manuscripts should not have been previously published nor should they be currently under consideration for publication elsewhere.
Request for Information
Tony Tae-Hyoung Kim, Email: thkim@ntu.edu.sg
Guest Editors:
- Tony Tae-Hyoung Kim, Nanyang Technological University, Singapore (Corresponding Guest Editor)
- Bongjin Kim, University of California, Santa Barbara, CA, USA
- Joo-Young Kim: KAIST, South Korea
- Jaydeep Kulkarni, University of Texas at Austin, TX, USA
Important Dates
- Manuscript submissions due: 7 December 2021
- First round of reviews completed: 1 January 2022
- Revised manuscripts due: 15 March 2022
- Second round of reviews completed: 15 April 2022
- Final manuscripts due: 10 May 2022
- Publication date: 30 June 2022
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The latest issues of our CAS sponored journals have been published and the tables of contents can be accessed through the following links:
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- IEEE Journal on Emerging and Selected Topics in Circuits and Systems
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