CHAPTER NEWS

Silicon Valley Circuits and Systems Chapter Concluded the Year in Analog/

Mixed Signal IC Design with Talks by Distinguished Lecturers

As in the first half of the year, the Santa Clara Valley Circuits and Systems Chapter (SCV CAS) sponsored events on a variety of topics with participation of professors, IC design engineers, managers and executives. All the topics thoroughly engaged professionals and students who attended the talks.

National Semiconductor Auditorium, Santa Clara, CA

Among topics presented were: “Low-Voltage Oversampling Analog-to-Digital Conversion” by Dr. Bruce A. Wooley, Robert L. and Audrey S. Hancock Professor of Engineering, Stanford University; “Molecular Modification of PCB Substrates for Fine Line Patterning” by Dr. Werner Kuhr, Founder and VP Research, ZettaCore, Inc.; “Energy-Efficient On-Chip Power Management: System, Circuit and Device Perspectives” by Dr. Eduard Alarcón, Professor, Universitat Politecnica De Catalunya; “Reverse Engineering in the Semiconductor Industry” by Mr. Randy Torrance, (Chipworks); “Promising Low Power Reusable Solutions: Application Specific Instruction-set Processors” and “Cost Effective Low Power IP Designs for Mobile Communications” by Dr. Myung H. Sunwoo, Professor, Ajou University, Suwon, Korea.

In September, at the National Semiconductor Auditorium, Dr. Wooley presented recent research results on low voltage oversampling A/D converters. The design of over-sampling ADCs entails a trade off in accuracy in time for accuracy in amplitude. The talk began with an overview of delta-sigma converters focusing on both architectural and circuit aspects and concluded with implementations targeted for low voltage, low power applications given the increasingly severe constraints on power supply and power dissipation. Because ADCs do not require stringent component matching, and because of their capability for high resolution, over the years, they have become increasingly popular.

Dr. Kuhr, in his presentation, summarized recent developments in molecular electronics, namely a new molecular interface technology for the improved ability to pattern copper lines for smooth epoxy and copper surfaces, combining existing and new technologies. First, a molecular adhesion is formed to allow electroless deposition and electroplating of copper onto smooth epoxy or copper substrates. By means of a thermally induced reaction with the substrate, molecules attach themselves to the smooth PCB substrate, which facilitates copper electroless plating which in turn is used as a seed layer to allow larger quantities of copper to be deposed using conventional processes. The fabrication results that were discussed showed this new technology to be effective in patterning copper lines at fine feature sizes.

The next presentation by Dr. Alarcón was on power management ICs: a burgeoning field resulting from the proliferation of mobile devices and the increasing prevalence of systems on chip. Moreover, this niche of analog IC design is fostering the development of a complete Powered System on Chip (PSOC) i.e., a complete monolithic integration of the power converter and all the circuits that make up its load. Key factors in the design will be to continue reducing size and enhancing operating lifetime as loads increase. The presentation covered a variety of topics ranging from on-chip power supply design and implementation to adaptive wideband envelope-tracking power supplies for RF power amplifiers.

The topic on reverse engineering in the semiconductor industry was introduced by Mr. Torrance. For a company to be successful it must not only engage in effective research and development but must track competition, monitor technological developments, product costs, new features, sales avenues and management. Whether designing next-generation integrated circuits or entering a new market, a key step is to purchase a competing product, disassemble it, examine its inner workings and then design and manufacture a new version. Over the course of the last decades significant technological advances have been made in the area of reverse engineering and this approach was particularly popular in some countries.

Cadence Design Systems, San Jose, CA

The year concluded with presentations by Dr. Sunwoo on: “Promising low power reusable solutions: Application Specific Instruction-set Processors” and “Cost effective low power IP designs for mobile communications.” The first talk given at Santa Clara University in cooperation with Dr. Nam Ling, Associate Dean School of Engineering, described an ASIP and its purpose; following, was a discussion of some designs: “Signal Processors for OFDM Communications,” “Digital Audio Specific Instruction set Processor,” “Video Specific Instruction set Processor”; the talk concluded with trends of recent ASIPs. The second presentation on ”Cost Effective Low Power IP Designs for Mobile Communications” was held at Cadence Design Systems and focused on 4 low power high speed SOC IP designs for communication systems.

In addition to sponsoring 17 technical seminars this year, SCV CAS also co-sponsored the 2009 IEEE Workshop on Silicon Errors in Logic-System Effects (SELSE 2009) and the 2009 IEEE International Behavioral Modeling and Simulation Conference 2009. Moreover, SCV CAS conducted a survey among its members and in cooperation with the IEEE SCV Section, seeks input from academia, industry and public servants regarding the unemployment of engineers.

The SCV CAS officers are: Chair Mark S. Hooper, Vice Chair Weikai Sun, Treasurer Ping Chen, Secretary Shyam Rapaka, Publicity Chair Navneet Jain, Program Chair Howard Sun and Outreach Chair TLoan Nguyen.

We wish to convey our appreciation to the Lecturers for sharing their expertise with our members; to the SFBAC Communications Director, Paul Wesling, for coordinating the announcements on the IEEE e-Grid; to Cadence and National Semiconductor for providing convenient venue for our meetings, as well as to the Chapters who cosponsored several events: EDS Chair Prasad Chaparala, ComSoc Chair Bin Hu and Co-Chair Lu Chang, CPMT Chair Ed Aoki, SPS Chair Tokunbo Ogunfunmi and MTT Chair Luiz Franca-Neto. Many thanks to all for the generous contributions that made this year a productive one... and best wishes to all for the new year 2010!

Mark S. Hooper, 2009 IEEE SCV CAS Chair (Email: m.hooper@ieee.org)