CHAPTER NEWS

The IEEE Silicon Valley Circuits and Systems Chapter Discusses the Progression of Analog/Mixed Signal  IC Design: En Route to Ubiquitous Circuits

The discussions at the Silicon Valley Circuits and Systems Chapter  continued on the state-of-the-art in solid state circuits including a recent presentation on future trends in mixed IC design by Dr. Boris Murmann, Associate Professor, Stanford University. Following a snapshot of the semiconductor industry, he addressed the need for analog/mixed signal interfaces and concluded with research examples.

Since the invention of the transistor by Schockley, Bardeen and Brattain in 1951 and the first working IC by Kilby in 1958, the early days of analog integrated circuits saw bipolar as the prevailing technology, though rapid advances were made in MOS technology in the late 1970s to accommodate monolithic integration. In the late 1980s, it was not clear whether MOS would develop as the dominant technology but because of  increased operating frequencies and the possibility of monolithic integration, MOS became indeed quite popular. Among initial applications were packaged ICs for military and aerospace industries and  in the 1980s there was the emergence of the microprocessor chip for desktop
computers, followed by very large-scale integration and digital signal processing until about 2000.  In the current decade, the  merging of multiprocessing gigabit non-volatile memory resulted in  converging applications for consumer and computer communications.

Thus, what would be in store for analog/mixed signal/RF ICs in the future?  Basically, as presented by Dr. Murmann, we  would  see increasingly complex applications integrated on a chip, the continued miniaturization of systems and chips would become systems of systems for all kinds of applications including auto, aerospace and healthcare industries. To accommodate the growing miniaturization of systems, transistors would continue to shrink leading to novel technologies.  In the 100 nm to 22 nm range we have been witnessing evolutionary CMOS design. On the other hand, in the 22-10 nm range, designs would require revolutionary approaches such as using nanowires and nanotubes. And designs  under 10 nm, would lead us  into the realm of exotic integrated circuits.

The semiconductor system would  be complemented with macroelectronics, which is characterized by integrated circuits on typically flexible organic substrates much larger than a wafer for applications on areas measured in square meters. Some of the applications, are flat panel displays (stadium in Miami will soon have the world’s
largest high definition video display, about 15 m high and 40 m wide), solar cell arrays  encompassing several square meters, imaging sensors for digital radiography and smart clothing embedded with electronics. In addition to flexibility, other characteristics of organic transistors that can’t be easily achieved by silicon-based circuits are shock-resistance, reduced thickness and weight. However, the mobility of organic transistors is about three orders of magnitude lower than silicon resulting in slower circuits. Nevertheless, organic RF ICs would probably materialize in the near future despite the challenges in achieving higher device speeds and  higher quality passives [1].
Integrated circuits, both organic and semiconductor  based,  would  find their way in an ever growing number of applications. Chips
would continue to spread to the point where they would  become almost ubiquitous. Research is underway in academia and industry  in  ubiquitous electronics, which would render an environment sensitive and responsive to the presence of human beings. The objective is to enable  execution of various activities with greater convenience and less stress by means of data embedded in the network connecting the integrated circuits.  Ubiquitous electronics, similar in function to the nervous system in the human body, would thus spread throughout the environment.

With respect to cost, as elaborated in [2], it is often concluded that organic circuits would be inexpensive to fabricate because they can be manufactured on polymer substrates without the need of photolithography. However,  cost per transistor using high resolution printing would be higher  compared to UV lithography. For example, it costs less than 0.1 nanocent to fabricate a silicon FET using 193 nm lithography or according to some estimates,  it costs less to fabricate a silicon transistor than  to print one newspaper character [3]. Also the performance of organic circuits fabricated from photolithography would never be comparable to the performance of printed organic circuits. Consequently, organic circuits, at present, will not be as attractive as silicon for  applications that are dependent on  cost per transistor.  However, in applications such as displays, sensors and detectors, where large area coverage, low-temperature processing and flexibility are determinative factors rather than cost per transistor and where  single-crystal silicon is not suitable, organic circuits would  fill a need.

Thus, the future for mixed signal IC design is diverging in two directions: on the one hand, macroelectronics, featuring  integrated  circuits on organic substrates in the square meter range for large area applications and on the other hand, the continued miniaturization of semiconductor systems on die with feature sizes approaching  subnanometer dimensions. The combination of these two trends would foster a new stage for ubiquitous electronics. 

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The SCV CAS Chapter is pleased to report that the next technical presentation—”Energy-Efficient Design of Digital Circuits”— by Dr. Vojin Oklobdzija, Professor, University of Texas, Dallas (Vice-President of IEEE CAS and Member of the IEEE CAS Board of Governors and Distinguished Lecturer of the IEEE Solid-State Circuits Society) co-sponsored with the SCV Solid State Circuits Society is scheduled for  April 15th. This joint event is being held in cooperation with the  SCV Solid State Circuits Society officers Chair Kiran Gunnam, Vice Chair Gregoire de Mercey, Treasurer Shailesh Nerurkar, Secretary Afshaneh Pakdaman, Webmaster Perry Chow and Qualcomm sponsor  Jonathan David. The SCV CAS Chapter officers are: Chair Weikai Sun, Vice Chair Ping Chen, Secretary Mark S. Hooper, Publicity Chair Navneet Jain and Program Chair Howard Sun.


References

[1] Ma Z. and Sun L., "Will Future RFIC be Flexible?," IEEE 2009 Wireless and Microwave Technology Conference, pp. 1-5.

[2] Klauk H., "Organic Circuits on Flexible Substrates," IEEE 2005 Electron Devices Meeting, IEDM Technical Digest, pp. 446-449.

[3] http://tinyurl.com/yzryrk9 .

Mark S. Hooper (m.hooper@ieee.org), 2010 IEEE SCV CAS Secretary