IEEE Circuits and Systems Society Newsletter | Volume 15 | Issue 1 | February 2021 | CURRENT/PAST ISSUES

PUBLICATION NEWS

JETCAS Special Issue - Call for Papers: Circuits and Systems for Smart Agriculture and Healthy Foods

Scope and Purpose

Smart Agriculture is an emerging application domain where electronic circuits and systems can have a huge impact at all levels, from sensors and readout, up to the management, elaboration, and transmissions of data. This Special Issue wants to collect contributions from stakeholders engaged in developing electronic circuits and systems for the edge technologies applied to:

  • Food Production - for precision agriculture methodologies, optimizing cultivations in terms of yield and quality, reducing the use of treatments (pesticides, …) and of resources (water, …); for the implementation of automated equipment for harvesting, treatment, and packaging
  • Food Preparation - for the monitoring of ingredients and processes, for a safe and sustainable production
  • Food Monitoring - for following the food during its shipment, obtaining useful information for best transportation, and optimized delivery in terms of time to reach customer tables
  • Food Preservation - for obtaining continuous information about the food status and for controlling packaging processes
  • Food Regulation - which introduces the need for online environment control and food status, during harvesting, elaboration, packaging, and shipping

The need for monitoring systems for food at all levels is mandatory. This involves the introduction of new sensing platforms connected to efficient and low-power smart electronic systems, with the challenges to be as much as possible autonomous and low-cost.

As well described in an article published by Forbes: “We are at the beginning of the most radical transformation of our food industry since the Green Revolution. ...information technology, in combination with multidisciplinary design, policy interventions, and agroecological production practices can help the sustainable food industry scale in a way that preserves the industry’s integrity."

It's for all of the above reasons that this Special Issue wants to collect the most advanced studies that the CAS community is doing in this emerging field, which is fundamental for the health and the well-being of our human society.


Topics of Interest

Topics of interest for this Special Issue include, but are not limited to, contributions concerning the application of CAS to the AgriFood chain. In particular, these may include the application of Smart Electronic Systems or Devices for:

  • Precision Agriculture
    • On-field monitoring, data collection, and transmission
    • Production control
    • Environment and on-field monitoring
    • Green sustainability
  • Water
    • Control of water distribution, monitoring flow and quality by smart electronic systems that with a sensor fusion approach can extract useful information for the end-users
    • Management and optimization of resources by closed-loop systems that, having the needed information, can automatically apply countermeasures or at least trigger warnings/alarms for the intervention of supervisors
  • Food Chain
    • Smart Electronics for the control of food production, managing in a much as possible automatic way processing, and preparation
    • Shipment, with mobile monitoring devices for managing and controlling the food delivery, measuring the conditions when the food is stored, transported, maintained in shops or in markets

Submission Procedure

Prospective authors are invited to submit their papers following the instructions provided on the JETCAS website. The submitted manuscripts should not have been previously published nor should they be currently under consideration for publication elsewhere.

Request for Information

  • Danilo Demarchi (Danilo.Demarchi@polito.it)

Important Dates

  • Manuscript submissions due: 28 February 2021
  • First round of review completed: 30 April 2021
  • Revised manuscripts due: 15 June 2021
  • Second round of reviews completed: 10 July 2021
  • Final manuscript due: 10 August 2021
  • Target publication date: 30 September 2021


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JETCAS Special Issue - Call for Papers: Cross-Layer Designs, Methodologies, and Systems to Enable Micro AI for On-Device Intelligence

Scope and Purpose

Artificial intelligence (AI) and robotics technology continue to have a major role in enabling future smart cities, transportation, surveillance, logistics, smart sensing, home health care, and medical technologies. These fields rely on large data-driven approaches and highly computation-intensive algorithms and tend to compute in the cloud and data centers. Local processing on an embedded device is often required to provide low latency and less dependence on the communication link for bandwidth and privacy/security concerns. However, processing locally on a device is very challenging due to limited memory storage and battery capacity. This proposal invites researchers to submit state-of-the-art computing methods through cross-layer design approaches in algorithms, architecture, hardware, and system integration, which will enable micro-intelligent systems to perform on-device sensor data analytics and various AI tasks at extremely low power.

In particular, this special issue seeks contributions encompassing the following broad scopes:

  • AI model design: Novel reinforcement learning-based neural architecture search (NAS) methods generally aim to automatically explore the least computationally complex AI models that meet a targeted accuracy. Nevertheless, these searching methods seldom take into account the challenges of deploying the computationally-reduced AI model at the edge (hardware). This topic covers NAS methods that jointly explore efficient AI models including artificial neural networks (ANNs), deep neural networks (DNNs), recurrent neural networks (RNNs), and spiking neural networks (SNNs), etc., for feasible implementation on resource-bound hardware.
  • Hardware design methodology: This topic covers novel approaches of task scheduling, tiling scheme, and data movement with various implementation styles and goals such as energy, power, and timing. Implementation styles such as in-memory computing, near-memory processing, and systolic array architecture, as well as techniques considering tradeoffs among computation and communication, the arrangement of processing engines, selection of fixed/floating-point/flexible hardware data width, and their impact on timing, power, performance, and energy efficiency are worthy of consideration in this topic.
  • Memory hierarchy and data movement: In high dimensional AI models, the memory footprint dominates the silicon area, and the energy and delay overheads resulting from memory communication for implementing the AI models are significantly higher as compared to computation. Methods of efficiently implementing pruned or compressed AI models as well as different methods of data movement through different levels of the memory hierarchy (e.g., from DRAMs to SRAMs), and precise/flexible size allocation to different memory levels are among the issues to be addressed in this topic.
  • Flexibility and reliability: While small AI models can be more conveniently implemented at the edge, the implementation of large models is still a challenging task for the resource-bound hardware. Meanwhile, the susceptibility of spiking neural networks to noise and event upsets is another challenge. This topic calls for novel methods considering flexible and reliable hardware design for versatile modern AI applications.


Topics of Interest

This special issue focuses on micro/tiny machine learning hardware approaches within the following topics:

  • AI applications at the edge (e.g., 5G, healthcare, medical applications, industry, etc.)
  • Circuits and architecture design enabling micro-AI
  • Applications and hardware for learning on a smart micro-AI device
  • Ultra-low-power memory and communication design for micro-AI
  • Sparse learning, feature extraction, and personalization
  • Emerging technologies for enabling micro-AI devices
  • NAS methods that search optimal ANNs for feasible hardware implementations
  • Cross-layer optimization for ANN architecture and application
  • Energy-, bit error-, and accuracy-aware pruning and quantization mechanism of ANNs
  • Communication-aware AI subsystems for future on-chip adaptive learning application
  • Systolic array architecture, near-memory, and in-memory computing techniques
  • Tradeoffs among computation vs communication considering energy/power/timing
  • Efficient on-chip communication/computation of multicore-based ANNs
  • ANN subsystem design based on emerging non-volatile memory devices
  • Data movement optimization through task scheduling of the ANN
  • Novel interconnection networks for the ANNs (e.g., DNN, RNN, SNN, etc.)
  • Novel topology of on-chip communication for efficient ANN processing
  • NoC design for heterogeneous ANN computing
  • Applications and artificial general intelligence (AGI)
  • Flexible, reliable, and robust computing methods
  • Wearable AI devices for health monitoring/detection
  • Algorithm and architecture co-design of energy-efficient ANNs


Submission Procedure

Prospective authors are invited to submit their papers following the instructions provided on the JETCAS website. The submitted manuscripts should not have been previously published nor should they be currently under consideration for publication elsewhere.

Request for Information

  • Tinoosh Mohsenin, Corresponding Guest Editor

Guest Editors

  • Tinoosh Mohsenin, University of Maryland Baltimore County, USA
  • Xin Zhang, IBM T. J. Watson Research Center, USA
  • Houman Homayoun, University of California, Davis, USA
  • Jae-sun Seo, Arizona State University, USA

Important Dates

  • Manuscript submissions due: 1 May 2021
  • First round of review completed: 30 June 2021
  • Revised manuscripts due: 15 August 2021
  • Second round of reviews completed: 15 September 2021
  • Final manuscript due: 10 October 2021
  • Target publication date: 1 December 2021


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